1. Field of the Invention
The invention relates to a semiconductor device and a method of operating a phase-change random access memory device. More particularly, the invention relates to a phase-change random access memory device and a method of operating a phase-change random access memory device.
2. Description of the Related Art
Memory semiconductor devices may be classified into volatile memory devices and non-volatile memory devices based on whether or not a supply of power is necessary to maintain data stored in the memory. Volatile memory devices, e.g., a dynamic random access memory (DRAM) and a static random access memory (SRAM), may have relatively fast operating speeds, but generally require a supply of power to maintain data. In general, non-volatile memory devices, e.g., a flash memory, generally do not require a supply of power, but generally have a relatively slow writing speed. Table 1 below lists some advantages and disadvantages of conventional memory devices. New memory devices that overcome one or more disadvantages of the conventional memory device are desired.
TABLE 1Volatile memory deviceNon-volatile memory deviceTypeSRAMDRAMFLASHFeRAMMRAMPRAMREAD speedHighMediumHighMediumMedium/highMedium/highWRITE speedHighMediumLowMediumMedium/highMediumNon-volatilityNoNoYesMediumYesYesRefreshUnnecessaryNecessaryUnnecessaryUnnecessaryUnnecessaryUnnecessarySize of Unit CellLargeSmallSmallMediumMediumSmall
In view of current trends of miniaturization and portability in electronic products, and the dependence of semiconductor device price on the density of integration, new memory devices that satisfy a plurality of technical requirements, e.g., non-volatility, low-power consumption, fast operating speeds and high integration, are desired. Attempts to satisfy such technical requirements have introduced phase-change random access memory (PRAM) devices, magnetic random access memory (MRAM) devices, and ferroelectric random access memory (FeRAM) devices as next-generation memory devices.
Relative to the MRAM and FeRAM devices, PRAM devices may have low manufacturing costs because a phase-change material layer may be easily formed without technical problems. Moreover, data stored in the PRAM devices can be dependably maintained for more than 1013 iterations, and PRAM devices can operate at high speeds, e.g., about 30 ns.
FIG. 1 illustrates a graph of a crystalline state of a phase-change material layer according to temperature and time. In FIG. 1, an x-axis and a y-axis denote time T and temperature TMP, respectively.
Referring to FIG. 1, if the phase-change material layer is heated to a temperature above a melting temperature Tm for a first duration T1, and then cooled, the phase-change material layer may transition to an amorphous state (1). If the phase-change material layer is heated to a temperature between the melting temperature Tm and the crystallization temperature Tc for a second duration T2, which is longer than the first duration T1, and then cooled, the phase-change material layer may transition to a crystalline state (2). Resistance of the phase-change material layer in a crystalline state may be different, e.g., lower, than a resistance of the phase-change material layer in an amorphous state. This property of the phase-change material layer, i.e., resistance that depends on the crystalline state of the phase-change material layer, may be used for a reading operation of a phase-change memory cell. For example, data stored in the phase-change memory cell may be determined by sensing a current flowing through the phase-change material layer.
Because data of a PRAM device may be distinguished based on a crystalline state of the phase-change material layer, unlike a conventional memory device, one phase-change memory cell may have several data states. In particular, if a crystalline region, i.e., a region having a crystalline state, which may be formed on the phase-change material layer, is changed in volume, an electrical resistance of the phase-change material layer may be changed. Thus, because data stored on the phase-change material layer may be dependent on an electrical resistance thereof, an adjustment in volume of crystalline region may enable one cell to have several data states.
FIG. 2 illustrates a relationship between current and voltage based on a change in volume of a crystalline region. In FIG. 2, an x-value may be a parameter for determining a resistance of the phase-change material layer. For example, x=1, may correspond to a current-voltage curve (I-V curve) for a case in which an entire programmable region of the phase-change material layer transitions to an amorphous state, and x=0 may correspond to an I-V curve for a case in which an entire programmable region transitions to a crystalline state. In general, a writing operation may not change a crystalline state of the entire phase-change material layer, but may change a crystalline state of a local region. A programmable region may correspond to a maximum size of a local region in which a crystalline state is changed during a writing operation. As illustrated in FIG. 2, for 0<x<1, the I-V curve may correspond to a case in which a portion of the programmable region has a crystalline state, and a change of an x-value represents a change in volume of the crystalline region.
Referring to FIG. 2, the I-V curve for x=1 may have a first inflection point P1 and a second inflection point P2, where the second inflection point P2 may correspond to a smaller voltage coordinate than that of the first inflection point P1, and a larger current coordinate than that of the first inflection point P1. The respective I-V curve for other x-values may also have respective first and second inflection points. For each I-V curve, a voltage coordinate, e.g., V1, V0.8, and V0.6, of the first inflection point P1, may denote a minimum voltage, i.e., a threshold voltage Vth, which may be required to form crystalline regions, of a volume corresponding to the x-value, in the phase-change material layer in an amorphous state. If, e.g., a voltage of the V1 or higher is applied to the phase-change memory cell, the entire programmable region may transition to a crystalline state. If, e.g., a voltage between V0.6 and V0.8 is applied to the phase-change memory cell, a crystalline region having a volume corresponding to an x-value between 0.6 and 0.8 may be formed in the programmable region. Accordingly, as illustrated in FIG. 2, the magnitude of a current measured at a predetermined reading voltage VR may be dependent on a volume of each crystalline region, i.e., an x-value. As discussed above, owing to the current characteristics depending on the x-value, one cell may be one of several data states.
Referring to FIG. 2, I-V curves for x=0, 0.2, and 0.4 may have inflection points, i.e., threshold voltages, whose position, i.e., coordinate values, may be unclear. Due to such uncertainty of the threshold voltage, a write voltage, which may be needed to change the phase-change memory cell into a required data state, may be difficult to determine. Thus, it may be difficult to determine a data state of the memory cell based on the applied write voltage. Owing to the uncertainty of the threshold voltage, the threshold voltages for x=0, 0.2, and 0.4 may not be obviously distinguished from a voltage applied for a writing operation. As a result, the data state of the phase-change memory cell may be changed by repetitive reading operations. Such change of data state may be detrimental and/or fatal to product quality of the memory device.
With regard to I-V curves for x=0, 0.4, and 0.6, the respective currents at the reading voltage VR may be too similar to be distinguished. Such similarity in the current coordinates may make it difficult to perform a reading operation, because recorded data may be determined based on the relation between a data state and a corresponding current.